8254/8253 Programmable interval timer

SHORT DESCRIPTION


The 8254 includes 3 identical 16-bit counter that can operate independently in any one of the 6 modes.
This includes a Status read back Command that can latch the count and status of counter.


8254 Block Diagram

Each counter has 2 input signals CLK and GATE and one output signal OUT.

DATA BUS BUFFER

This tri state 8-bit bidirectional buffer is connected to data bus of MPU.

CONTROL LOGIC

This section has 5 signals RD(bar)(Read) WR(bar)(Write) CS(bar)(Chip select) and address line
A0 and A1.

In peripheral I/O mode 
RD(bar) – IOR(bar)
WR(bar) – IOW(bar)

In Memory mapped mode
RD(bar) – MEMR(bar)
WR(bar) – MEMW(bar)

A0 and A1 decoded address
A0 A1 Selection
0 0 Counter 0 
0 1 Counter 1
1 0 Counter 2
1 1 Control Register


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